Integral Sampler and Polynomial Multiplication Architecture for Lattice-based Cryptography

Published in 2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)., 2022

Recommended citation: Antian Wang, Weihang Tan, Keshab K. Parhi, and Yingjie Lao. "Integral Sampler and Polynomial Multiplication Architecture for Lattice-based Cryptography." In 2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).. pp. 1-6. IEEE, 2022.

This paper propose a sampler design methodology that reuse the underlying computation resources within butterfly units.

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Recommended citation: Antian Wang, Weihang Tan, Keshab K. Parhi, and Yingjie Lao. “Integral Sampler and Polynomial Multiplication Architecture for Lattice-based Cryptography.” In 2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).. pp. 1-6. IEEE, 2022.