Pipelined high-throughput NTT architecture for lattice-based cryptography
Published in 2021 Asian Hardware Oriented Security and Trust Symposium (AsianHOST)., 2021
Recommended citation: Weihang Tan, Antian Wang, Yingjie Lao, Xinmiao Zhang, and Keshab K. Parhi. "Pipelined high-throughput NTT architecture for lattice-based cryptography." In 2021 Asian Hardware Oriented Security and Trust Symposium (AsianHOST). pp. 1-4. IEEE, 2021.
This paper designs a NTT MDC based FPGA hardware accelerator for Lattice-based cryptography using folding.
Recommended citation: Weihang Tan, Antian Wang, Yingjie Lao, Xinmiao Zhang, and Keshab K. Parhi. “Pipelined high-throughput NTT architecture for lattice-based cryptography.” In 2021 Asian Hardware Oriented Security and Trust Symposium (AsianHOST). pp. 1-4. IEEE, 2021.