ECE 43700 Computer Design and Prototyping (25 Spring)

Undergraduate Course with Lab section, Purdue University Fort Wayne, Department of Electrical and Computer Engineering, 2025

Computer design is the science and art of selecting and interconnecting hardware components to build a computer that meets functional, performance, and cost goals. In this course, students will learn to design a uniprocessor computer system, including processor datapath, processor control, memory systems, and I/O. The course provides a thorough and detailed treatment of basic computer arithmetic algorithms, multi-cycle implementations of modern computer instruction sets, pipelined CPU designs, design of cache hierarchy and virtual memory, and fundamentals of computer system I/O. The course also includes evaluation and analysis of processor and memory performance.

Course Coverage

The course discusses the latest RISC-V instruction set architecture. The modules of the course include:

  • Introduction
  • Number system, last dance, including floating point operations, floating point pitfall moment, unum/posit,
  • Computer performance evaluation, including Performance (time/Iron law), Power, and Area (PPA) consumption
  • RISC-V assembly programming and instruction set
  • Single cycle and pipelined RISC-V processor design; structure/data/control hazards; Additional discussions on processor varations, including out-of-order/ multi-issue/ multi-cycle processors
  • Memory circuit premier, cache and memory hierarchy and their performance evaluation; Virtual memory; memory-centric computing, and latest advancement of memory technology
  • Parallel computing, including domain-specific accelerators.

Lab Component

The lab component is expected to strengthen students’ comprehension of the lecture portion of the course. Currently, the lab part composes of Lab 01 Floating Point Unit Design, Lab 02 RISC-V Assembly Programming, Lab 03 Single-cycle processor design, Lab 04 5-stage pipelined processor design, Lab 05 Memory system design

Lab 01 Parameterized Floating Point Unit (FPU) design

Lab 02 RISC-V Assembly Programming

Lab 03 Single-cycle processor design

Lab 04 5-stage pipelined processor design

Lab 05 Memory system design